Power semiconductor devices are critical for energy infrastructure, which provides power generation and distribution to end user applications such as elevators, electric trains, ship propulsion, automobiles, electric motors, home appliances, computers, and powering hand held devices. At the heart of all of these power systems is a power converter to step-up or step-down electric voltages. A core component of the power converter is a power switch. An ideal power switch must pass any amount of current with the least or no voltage drop in a closed or ON state and withstand all applied voltage with no current flowing in an open or OFF state. For a real power switch, low ON state resistance, high breakdown voltage, high switching speed, and the ability to sustain high temperature of operation are critical figures of merit (FOM). Gallium nitride (GaN) is a wide bandgap semiconductor material often used to form a power switch due to its high electron mobility, high critical field, and the ability to sustain high temperatures of operation when compared to other widely used semiconductors such as Silicon (Si) or Silicon Carbon (SiC).
A power switch may be implemented by a power field-effect transistor (FET). A power FET formed by gallium nitride is classified as either lateral or vertical based on the direction of majority carriers (electrons) that flow in the FET structure. In the lateral power FET, the electrons flow along the surface of a two dimensional electron gas (2DEG) layer realized at the heterojunction of GaN and its alloys with Aluminum (Al) or Indium (In). To reduce material cost, in some of the lateral GaN power FETs, the GaN and GaN alloys are grown on widely available, low cost Si substrates. However, this approach has several known disadvantages including the need for large lateral dimensions in proportion to voltage and current rating, degraded thermal handling capability due to the use of the Si substrates, and significant current collapse where trapped charges near the interface between a gate metal and an underlying semiconductor region reduce the available current at high switching speeds due to the slow response of the trapped charges.
The vertical GaN power FET, on the other hand, is fabricated on a bulk GaN substrate where the electrons flow vertically through the bulk GaN substrate. As most of the voltage drop takes place in the vertical direction, the lateral dimensions of the vertical GaN power FET need not scale with voltage unlike lateral devices. Switching speed and thermal handling capabilities are enhanced while the current collapse problem is mostly eliminated. However, p-n junctions are required in the vertical GaN power FET to achieve higher switching speeds, which has been a significant challenge to realize. The activation energy EA of the most commonly used p-type dopant, such as Magnesium(Mg), in GaN is about 200 meV, which is several times the thermal energy kBT at room temperature (where kB is the Boltzmann constant, and T is temperature). Therefore, even to achieve moderate hole concentration, like 1×1016 /cm3, at room temperature, the p-type dopant concentration must be 5 to 10 times higher compared to the n-type dopant concentration needed to achieve the same electron concentration. The high concentrate of the p-type dopant leads to low carrier mobility arising from impurity scattering. This problem is well addressed by polarization doping of graded aluminum gallium nitride (AlGaN)—a percentage of aluminum in the graded AlGaN varies gradually from a bottom to a top of a region- with p-type dopant. Consequently, built-in electric fields allow holes to be field-ionized from deep p-type-acceptor dopant atoms. This polarization enhancement to hole generation is shown to be two times to six times higher compared to a conventional doping process at room temperature. With the same concentration of the p-type dopant, the graded AlGaN improves carrier mobility compared to normal GaN material. A primary challenge in utilizing polarization induced (pi) p-type graded AlGaN (pi p-AlGaN) in real devices is to manage the excessive mechanical stress built in a pi p-AlGaN region grown on a bulk graded AlGaN substrate. In conventional designs of a vertical GaN FET, both the pi p-AlGaN region (>400 nms) and the underlying graded AlGaN substrate (5 to 10 μm) must be sufficiently thick for achieving high break down voltage(>1 kV). These graded AlGaN regions, with a total thickness >5 um, result in cracked surfaces that render the wafers unsuitable for device fabrication.
FIG. 1 provides an example of a conventional vertical GaN power FET 10. The vertical GaN power FET 10 includes a conductive substrate 12, a drift region 14, a pi p-AlGaN region 16, and a channel region 18. The drift region 14 resides over a top surface of the conductive substrate 12; the pi p-AlGaN region 16 resides over the drift region 14; and the channel region 18 extends vertically through the pi p-AlGaN region 16 into the drift region 14. The vertical GaN power FET 10 also includes ohmic contact regions 20 and source contact regions 22 within the pi p-AlGaN region 16, a conducting layer 24 over the channel region 18 extending to connect the source contact regions 22; and a gate dielectric region 26 over the conducting layer 24. In addition, a gate metal contact 28 resides over the gate dielectric region 26; source metal contacts 30 reside over the pi p-AlGaN region 16; and a drain metal contact 32 resides over the conductive substrate 12. In detail, the conductive substrate 12 is formed of
GaN and doped with an n-type dopant. The drift region 14 is formed of graded AlGaN, wherein a percentage of aluminum in the graded AlGaN increases from a bottom to a top of the drift region 14. The drift region 14 is doped with about a 1×1016/cm3 concentration of an n-type dopant and has a thickness between 5 μms to 10 μms. Those with ordinary skill in the art will recognize that the volume charge spreading achieved in the graded AlGaN drift region 14 is critical to achieve superior breakdown performance (breakdown voltage>1000V) of the vertical GaN power FET 10. The pi p-AlGaN region 16 is formed of graded AlGaN, wherein a percentage of aluminum in the graded AlGaN increases from a top to a bottom of the pi p-AlGaN region 16. The pi p-AlGaN region 16 is thicker than 400 nms and polarization doped with at least a 1×1018/cm3 concentration p-type dopant. The graded concentration of aluminum improves the carrier mobility. However, because of the mechanical constraint, it is a challenge to achieve a distinct aluminum concentration variation (normally from 0% to 30%) within a thick region, like the drift region 14 and the pi p-AlGaN region 16, without cracking surfaces.
Accordingly, there remains a need for improved power FET designs to achieve high switching speed and superior breakdown performance with a low possibility of cracked surfaces that render the wafers unsuitable for device fabrication.